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SAMAR K. SAHA is a Senior Technical Manager
at Synopsys TCAD business unit, Mountain View, CA, an Adjunct Professor
in Electrical Engineering department at Santa Clara University, Santa
Clara, CA, and an Associate Graduate Faculty in Electrical and Computer
Engineering department at the University of Nevada, Las Vegas, NV. Prior
to industry, Dr. Saha worked as an Assistant Professor in Electrical Engineering
Department at Southern Illinois University, Carbondale, IL, and Auburn
University, Auburn, AL. Since 1984 he worked in various positions for
SST, National Semiconductor Corporation, LSI Logic Corporation, Texas
Instruments, and Philips Semiconductors. He has authored more than 60
papers, holds four US patents, and offered tutorials/short-courses on
Technology CAD and Compact modeling. His research interests include silicon
nano-devices, NVM cells, and nano-crystal memory cell architecture, process,
device and compact modeling, and TCAD and R&D management. He received
the Ph.D. degree in physics from Gwahati University and M.S. degree in
engineering management from Stanford University. Dr. Saha is a senior
member of IEEE and a Distinguished Lecturer of Electron Devices Society
(EDS). He is the chair of IEEE-EDS Compact Modeling Technical Committee,
a member of EDS-meetings committee and publications committee, an EDS-representative
to the Council of Electronic Design Automation (CEDA), and the treasurer
of Santa Clara Valley chapter of IEEE-EDS. He is the Head guest editor
of the special issue of IEEE Transactions on Electron Devices on Advanced
Compact Models and 45-nm Modeling Challenges. |
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| Designed by Dr. B Bandyopadhyay | ||||||